Ben Goldstein-Smith is a Senior Director in O’Neill and Associates’ Washington, D.C. office

It has been almost two years since President Biden signed the CHIPS and Science Act into law with the promise to bolster U.S. semiconductor manufacturing, research and development, and workforce training with a near $53 billion investment. Despite semiconductors being invented in the United States, domestic production has fallen to just 10% of global supply, and research and development to less than 1% of GDP.

The funding from CHIPS is largely divided into two categories: brick-and-mortar and research and development.

On the brick-and-mortar front, the federal government has begun spending $39 billion to build facilities that will improve the supply chain and grow the domestic semi-conductor market.

The second category of funding, and the focus of most of the federal grants available this year fund research and development, for which the law allocated $11 billion available through several integrated entities, including:

National Semiconductor Technology Center (NSTC)

A consortium of public, private and nonprofit partners that will help allocate $5 billion to accomplish its goals. The NSTC released its road map in May and announced its first grant program in late June.

NSTC funding opportunities this year will include:

• AI Driven Radio Frequency Integrated Circuit Design Enablement
  • Grant competition currently open, proposals due August 16.
• Test Vehicles to test chip designs, advanced test chip processing and automated testing hardware
• PFAS Abatement, including efforts to reduce PFAS used in semiconductor manufacturing

 National Advanced Packaging Manufacturing Program (NAPMP)

This effort is investing $3 billion in programs that include an advanced packaging piloting facility for validating and transitioning new technologies to U.S. manufacturers, workforce training programs to ensure that new processes and tools are capably staffed, and funding for projects. NAPMP held its first grant competition this spring and just announced details surrounding it’s next $1.6 billion R&D funding opportunity that will open later this summer, investing in topics including:

• Equipment, Tools, Processes, and Process Integration
• Power Delivery and Thermal Management
• Connector Technology, Including Photonics and Radio Frequency (RF)
• Chiplets Ecosystem
• Co-design/Electronic Design Automation (EDA).

 CHIPS R&D Facilities

NAPMP and NSTC announced the process to identify and fund three large scale R&D facilities including:

• NSTC Administrative and Design Facility
• NSTC Extreme Ultraviolet (EUV) Center
• NSTC Prototyping and NAPMP Advanced Packaging Piloting Facility

 CHIPS Metrology

The CHIPS Metrology program funds research projects that further the stated goal to fuel work that ensures measurements are accurate, precise, and fit-for-purpose for the production of microelectronic materials, devices, circuits, and systems. It pursues a growing list of research areas and partnership/funding opportunities.

TIMELINE

Several opportunities outlined above are currently accepting applications with many others coming in the next few months. We recommend prospective applicants begin planning now. Many programs require collaborative applications, O’Neill and Associates has experience building coalitions and organizing necessary outreach.

Opportunities Currently Open:

• R&D for AI driven radio frequency integrated circuit design: August 16 deadline
• Various CHIPS Metrology research areas

Opportunities Opening in Coming Months:

• NAPMP $1.6 billion R&D funding for topics noted above
• CHIPS R&D Facility Selection
• R&D for Test Vehicles
• PFAS Abatement in semiconductor manufacturing

O’Neill and Associates will continue to help clients develop partnerships and capabilities needed to pursue these grants and will continue to monitor CHIPS funding developments.